June was sweltering, but the summer heat didn’t slow down open-source software developers. Last month delivered a wave of app ...

The interface provides four individually galvanically isolated LIN channels through a single PCIe card. FPGA-based Kvaser LIN-IP technology enables communication up to 20kbaud with 1µs timestamp ...

Spacecraft timing systems must provide highly stable, precise signals for navigation, communications and scientific instruments, even when GNSS signals are weak or unavailable. Designers often rely on ...

DIYer and woodworker April Wilkerson shares her design and process from a clock build-off project. He was fooling around on the edge - then his hand suddenly slipped Coffee found to have startling ...

As chip designs grow in complexity and face tighter power constraints, depending on a single clock domain is no longer practical. Instead, most modern chips incorporate as many as dozens or even ...

In July 2008, a 41-year-old Dutch woman developed a rapidly progressing illness after visiting Python Cave, a shallow groove cut into the Maramagambo Forest in Uganda that is home to thousands of ...

In 2003, when plumbing fixtures industry veteran Rob Buete first encountered the “walk-in tub” made by a startup called Safety Tub, he burst out laughing. A bathtub with a door? It seemed like a joke, ...

Metastability is bound to occur in VLSI designs during clock domain crossing. For a robust and reliable design, metastability needs to be mitigated. To understand how to resolve it and how to build a ...

Smaller version Illustration of a conventional atomic fountain clock (left) next to NPL’s miniature atomic fountain clock. (Courtesy: NPL) A miniature version of an atomic fountain clock has been ...

Signal integrity is one of the many challenges faced by chip designers. Deep submicron technologies are unfriendly hosts for the nice, clean signals desired. The culprits that compromise signal ...