IEEE

A Critical Review and Evaluation of LLMs for RTL Generation

Abstract: Large language models (LLMs) are emerging as powerful tools for hardware design, with recent work exploring their ability to generate register-transfer level (RTL) code directly from natural ...
IEEE

Inductive GNN-Based Methodology for Accurate and Fast Average Power Estimation of Synthesized ASIC Designs From RTL Simulation Bypassing Gate-Level Simulation

Abstract: This paper proposes an inductive Graph Neural Network (GNN) based methodology for accurate and fast average power estimation of logic-synthesized and RTL-simulated ASIC Design, eliminating ...